1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor memory called a DRAM (Dynamic Random Access Memory).
2. Description of the Prior Art
In a DRAM, since a memory cell is constituted by a capacitor in addition to a transistor, the underlayer of a bit line has a large step. For this reason, in order to reduce the step, planarization is performed by flowing a low-melting insulating film such as a BPSG film.
However, in the DRAM, the step of a peripheral circuit region is originally smaller than that of a memory cell region. For this reason, when the BPSG film is left in the peripheral circuit region to planarize the underlayer of the bit line, the step of an Al wire contact hole or the like is adversely increased, and the step coverage of the Al wire is degraded.
Therefore, the following steps are performed. That is, an SiN film is formed on the underlayer of the BPSG film by a low pressure CVD method, and the BPSG film in only the peripheral circuit region is removed by wet etching using this SiN film as a stopper.
However, since an SiN film formed by the low pressure CVD method has a high density, the SiN film has a function of preventing permeation of hydrogen. In addition, the SiN film covers not only the peripheral circuit region but the entire surface of the memory cell region.
On the other hand, an H.sub.2 sinter is generally performed to compensate for a generation recombination center such as an interface state in an Si-SiO.sub.2 interface region. This H2 sinter is normally performed before an Al film is deposited and after Al wiring contact hole is formed.
However, since the memory cell region has no Al wiring contact hole, the H.sub.2 sinter is not sufficiently performed, and a leakage current caused by the generation recombination center is generated. Therefore, in a DRAM manufactured in a conventional method, a leakage current flows in an access transistor, and sufficient data retaining characteristics cannot always be obtained.